{"product_id":"9780132827119","title":"High-Speed Signaling: Jitter Modeling, Analysis, and Budgeting","description":"\u003cp\u003e \u003cb\u003eNew System-Level Techniques for Optimizing Signal\/Power Integrity in High-Speed Interfaces--from Pioneering Innovators at Rambus, Stanford, Berkeley, and MIT\u003cbr\u003e \u003c\/b\u003e \u003c\/p\u003e  \u003cp\u003eAs data communication rates accelerate well into the multi-gigahertz range, ensuring signal integrity both on- and off-chip has become crucial. Signal integrity can no longer be addressed solely through improvements in package or board-level design: Diverse engineering teams must work together closely from the earliest design stages to identify the best system-level solutions. In High-Speed Signaling, several of the field’s most respected practitioners and researchers introduce cutting-edge modeling, simulation, and optimization techniques for meeting this challenge.\u003c\/p\u003e  \u003cp\u003e \u003c\/p\u003e  \u003cp\u003eEdited by pioneering experts Drs. Dan Oh and Chuck Yuan, these contributors explain why noise and jitter are no longer separable, demonstrate how to model their increasingly complex interactions, and thoroughly introduce a new simulation methodology for predicting link-level performance with unprecedented accuracy.\u003c\/p\u003e  \u003cp\u003e \u003c\/p\u003e  \u003cp\u003eThe authors address signal integrity from architecture through high-volume production, thoroughly discussing design, implementation, and verification. Coverage includes\u003c\/p\u003e  \u003cul\u003e  \u003cli\u003e  New advances in passive-channel modeling, power-supply noise and jitter modeling, and system margin prediction \u003c\/li\u003e  \u003cli\u003e  Methodologies for balancing system voltage and timing budgets to improve system robustness in high-volume manufacturing \u003c\/li\u003e  \u003cli\u003e  Practical, stable formulae for converting key network parameters \u003c\/li\u003e  \u003cli\u003e  Improved solutions for difficult problems in the broadband modeling of interconnects \u003c\/li\u003e  \u003cli\u003e  Equalization techniques for optimizing channel performance \u003c\/li\u003e  \u003cli\u003e  Important new insights into the relationships between jitter and clocking topologies \u003c\/li\u003e  \u003cli\u003e  New on-chip measurement techniques for in-situ link performance testing \u003c\/li\u003e  \u003cli\u003e  Trends and future directions in signal integrity engineering \u003c\/li\u003e \u003c\/ul\u003e  \u003cp\u003e \u003ci\u003eHigh-Speed Signaling \u003c\/i\u003ethoroughly introduces new techniques pioneered at Rambus and other leading high-tech companies and universities: approaches that have never before been presented with this much practical detail. It will be invaluable to everyone concerned with signal integrity, including signal and power integrity engineers, high-speed I\/O circuit designers, and system-level board design engineers.\u003c\/p\u003e","brand":"Pearson Education","offers":[{"title":"Default Title","offer_id":47119424454896,"sku":"9780132827119","price":104.0,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0737\/7593\/9824\/files\/9780132827119_p0.jpg?v=1763640963","url":"https:\/\/shop-qa.barnesandnoble.com\/products\/9780132827119","provider":"Barnes \u0026 Noble (DEV)","version":"1.0","type":"link"}