{"product_id":"9780133261509","title":"The CUDA Handbook: A Comprehensive Guide to GPU Programming","description":"\u003cp\u003e \u003c\/p\u003e \u003cp\u003e \u003ci\u003e \u003cb\u003eThe CUDA Handbook\u003c\/b\u003e \u003c\/i\u003e begins where CUDA by Example (Addison-Wesley, 2011) leaves off, discussing CUDA hardware and software in greater detail and covering both CUDA 5.0 and Kepler. Every CUDA developer, from the casual to the most sophisticated, will find something here of interest and immediate usefulness. Newer CUDA developers will see how the hardware processes commands and how the driver checks progress; more experienced CUDA developers will appreciate the expert coverage of topics such as the driver API and context migration, as well as the guidance on how best to structure CPU\/GPU data interchange and synchronization.\u003c\/p\u003e \u003cp\u003e \u003c\/p\u003e \u003cp\u003e \u003cb\u003eThe accompanying open source code–more than 25,000 lines of it, freely available at www.cudahandbook.com–is specifically intended to be reused and repurposed by developers.\u003c\/b\u003e \u003c\/p\u003e \u003cp\u003e \u003c\/p\u003e \u003cp\u003eDesigned to be both a comprehensive reference and a practical cookbook, the text is divided into the following three parts: \u003c\/p\u003e \u003cp\u003ePart I, Overview, gives high-level descriptions of the hardware and software that make CUDA possible. \u003c\/p\u003e \u003cp\u003e \u003cbr\u003e \u003c\/p\u003e \u003cp\u003ePart II, Details, provides thorough descriptions of every aspect of CUDA, including \u003cbr\u003e \u003c\/p\u003e \u003cul\u003e \u003cli\u003e Memory \u003c\/li\u003e \u003cli\u003eStreams and events \u003c\/li\u003e \u003cli\u003e Models of execution, including the dynamic parallelism feature, new with CUDA 5.0 and SM 3.5 \u003c\/li\u003e \u003cli\u003eThe streaming multiprocessors, including descriptions of all features through SM 3.5 \u003c\/li\u003e \u003cli\u003eProgramming multiple GPUs \u003c\/li\u003e \u003cli\u003eTexturing \u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003eThe source code accompanying Part II is presented as reusable microbenchmarks and microdemos, designed to expose specific hardware characteristics or highlight specific use cases. \u003cbr\u003e \u003c\/p\u003e \u003cp\u003e \u003cbr\u003e \u003c\/p\u003e \u003cp\u003ePart III, Select Applications, details specific families of CUDA applications and key parallel algorithms, including \u003c\/p\u003e \u003cul\u003e \u003cli\u003e  Streaming workloads \u003cbr\u003e \u003c\/li\u003e \u003cli\u003eReduction \u003c\/li\u003e \u003cli\u003eParallel prefix sum (Scan) \u003cbr\u003e \u003c\/li\u003e \u003cli\u003eN-body \u003c\/li\u003e \u003cli\u003eImage Processing\u003c\/li\u003e \u003c\/ul\u003eThese algorithms cover the full range of potential CUDA applications. \u003cp\u003e \u003c\/p\u003e","brand":"Pearson Education","offers":[{"title":"Default Title","offer_id":47077421613296,"sku":"9780133261509","price":44.99,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0737\/7593\/9824\/files\/9780133261509_p0.jpg?v=1763641287","url":"https:\/\/shop-qa.barnesandnoble.com\/products\/9780133261509","provider":"Barnes \u0026 Noble (DEV)","version":"1.0","type":"link"}