{"product_id":"9781461455073","title":"Designing TSVs for 3D Integrated Circuits","description":"\u003cp\u003eThis book explores the challenges and presents best strategies for designing Through-Silicon Vias (TSVs) for 3D integrated circuits. It describes a novel technique to mitigate TSV-induced noise, the GND Plug, which is superior to others adapted from 2-D planar technologies, such as a backside ground plane and traditional substrate contacts. The book also investigates, in the form of a comparative study, the impact of TSV size and granularity, spacing of C4 connectors, off-chip power delivery network, shared and dedicated TSVs, and coaxial TSVs on the quality of power delivery in 3-D ICs. The authors provide detailed best design practices for designing 3-D power delivery networks. Since TSVs occupy silicon real-estate and impact device density, this book provides four iterative algorithms to minimize the number of TSVs in a power delivery network. Unlike other existing methods, these algorithms can be applied in early design stages when only functional block- level behaviors and a floorplan are available. Finally, the authors explore the use of Carbon Nanotubes for power grid design as a futuristic alternative to Copper.\u003c\/p\u003e","brand":"Springer New York","offers":[{"title":"Default Title","offer_id":47054664335600,"sku":"9781461455073","price":69.99,"currency_code":"USD","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0737\/7593\/9824\/files\/9781461455073_p0.jpg?v=1763673971","url":"https:\/\/shop-qa.barnesandnoble.com\/products\/9781461455073","provider":"Barnes \u0026 Noble (DEV)","version":"1.0","type":"link"}