Afterworld

In this research, synthesizable resource efficient reconfigurable core is demonstrated for the novel approach of high level programming for Field Programmable Gate Arrays (FPGA). A reconfigurable 8-bit processing cell of Multimedia oriented reconfigurable array (MORA) [I1 is verified as an alternative for soft core architectures for streaming applications. A high level assembly language [2] as input to the assembler is used to configure and generate array of Reconfigurable Cells (RC). Proposed cell mapping with novel assembler (tool chain) approach is investigated with implementation of streaming benchmarks related to the media processing. The Soft Multimedia Oriented Reconfigurable Array (Soft MORA) generated from the tool chain is evaluated for performance, scalability by synthesizing and mapping the generated array on Xilinx Virtex 4 XC4VLX200 FPGA.